Sharp MZ

I don't recall there were MZ-800/NTSC so the chance to find a 110V version of MZ-800 PSU are close to zero. But you can replace the PSU block with a generic PSU which can deliver 5V as I did for a MZ-1500.

I know I had a discussion with him on FB and advised him to send you a release to test. Be aware mz-700 mode is not fully compatible with genuine MZ-700 in the end. I saw the "added" source for the MZ-700 hardware compatibilty in Chaky's emulator (I wish it had been under GIT and not SVN) but I see ...

Ok, so your two-clock circuit is extending the MARK if necessary. That is what I wanted to do more or less few years ago with the idea to add a fast SRAM to replace the DRAM. Full speed when running in SRAM, original speed otherwise. But there was still the issue with memory or I/O port access to mo...

Oh yeah, the ICS501M takes a CLK signal (so the CPU one in my case) and will multiply it by N (x5 in my case). There is some input pins to select N (0 or 1 or N.C). Note that CLKout(t) == CLKin(t) when t % N = 0. So basically, I could reuse your trick with the original CLK and the 5 x CLK. I still h...

In terms of your switching, have a look at the schematic below, (top right, IC's U9A, U4B, U9B, U14A/B, U9C, U9D, U1B), the two clocks go into dual D-Type flip flops, each clocked on their own clock and linked to the D input of the other. When the control signal (output of U4A) for Hi/Low speed cha...

The overclocking part of the schematic reminds me of MZ-80 K overclocking. I need to see the timing drawing to figure out how it will behave. I'm in the extremely case when there is no fast memory storage (no SRAM, no FLASH): - SLOW = (/MREQ = 0 OR /IORQ = 0) AND (/RD = 0 OR /WR = 0) [AND (/CLK = 0-...

I moved the overclocking discussion into a new topic: viewtopic.php?f=3&t=456

Subject regarding overclocking can be posted here.

Hi psmart! see you have a Z80@20MHz (I have plenty of those). Any plan to add a turbo frequence? I'm trying to picture out how to make one: LD r,r' ------- M1R:T1 M1R:T2 M1R:T3 M1R:T4 |_________ |_________ |_________ |_________ PHI x 1 / \_________/ \_________/ \_________/ \_________/ |_________ | |...

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