Introduction

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psmart
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Re: Introduction

Post by psmart » Thu Oct 08, 2020 7:39 pm

Photos of the board.
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IMG_2359 (1).jpg

psmart
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Re: Introduction

Post by psmart » Thu Oct 08, 2020 7:40 pm

Installed in the MZ700
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IMG_2230 (1).jpg

psmart
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Re: Introduction

Post by psmart » Thu Oct 08, 2020 7:43 pm

How it sits within the machine. It plugs into the Z80 socket and into the Modulator Connector. You can connect the modulator to the original motherboard output or to the new graphics generator.

There are 4 bits + 1 per colour, the 5th bit is needed to drive composite (requires > 2.0V whereas RGB is max 0.75V), but the 5th bit can be used to dim the output therefore adding another 16 shades of colour if needed.

Will document it on my site once Ive got to at least an Alpha stage.
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hlide
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Re: Introduction

Post by hlide » Fri Oct 09, 2020 10:17 am

That's awesome! I wonder how it performs compared to an Unicard.

Some questions:

1) It looks like the CPU is soldered. I certainly would prefer a low-profile "socket" (I have special pins for that). Especially I have some KL5C8400 CPUs which need a PCB+GAL to make it possible to replace a Z80.
2) EPM7512AE: wow! that sounds like quite a big CPLD! Would it be programmable if I want to add or modify some behaviors - supposedly there is still room?
3) EP3C25: FPGA Cyclone 3 where ZPU sits. Wonder if there is still room, isn't there?
4) Any FLASH/ROM?
5) K64FX512? An Arm Cortex-M4 120 MHz MCU? I'm lost about its purpose.
6) What about the legacy mode when set? Monitor ROM and VRAM obey the same restrictions regarding /WAIT?

I must revise my IPL512 board (thinking to reduce its width and remove the original ROM placeholder) because it won't fit with the big size of that board.

psmart
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Re: Introduction

Post by psmart » Fri Oct 09, 2020 2:16 pm

I'm not familiar with the Unicard, but the board runs at 20MHZ (either the original CPU Freq of 3.58MHZ or any frequency from 0Hz to 20MHz output by the MK64FX512 timer - the Z80 is the limit for the highest frequency). As the video/graphics are off the main board, they too run will run at the higher speed. ie. SEND v1 is too fast to play at 20MHz, the mothership and the fighters zoom way too quickly!!!

Good thing you mentioned the Z80 being soldered, I made 2 boards, the first one using socket and after fitting it, noticed it was about 1mm too high causing the casing to not sit flush, the second board I soldered the Z80 directly. I was about to remove the socket and solder it directly (I had thought of cutting the Z80 pins as the Z80 sits 1-2mm above the socket). Pictures below of the socketed board.

The CPLD and FPGA were over sized intentionally to allow development room as the worst thing is to have ideas and find there are no more resources inside the devices!! Below is the latest compiler stats, so as you can see, a lot of room. The Cyclone will have more added to it to accommodate the video logic (pixel addressing etc) but probably no more than a 1000 LE. The biggest limitation is the BRAM inside the Cyclone III, basically 66K which is fine for Video and CGROM but probably not enough for additional storage. The Cyclone III has a 16Mbit Flash RAM of which only a quarter is currently used for the FPGA bit stream, so potentially this could be used.

On the board there is 512K 45ns Static RAM accessible to the Z80 as paged banks but can also be accessed by the CPLD and the FPGA (via the CPLD).

The MK64FX512 is the I/O processor, this provides all the SD card services, terminal interface to zOS (my embedded OS) and has full access to the Z80 bus so you could write and run a 68000 emulator inside the K64FX using the z80 bus to access I/O if so desired, or any other CPU. Basically the tranZPUter was my concept of allowing a Z80 machine to be controlled by any other processor you could put into an FPGA, but as I had issues with the first cut of the tranZPUter, I started along the path of using a K64FX512 and called it the tranZPUter SW, where, like the PiTube for the BBC, you could write software CPU’s (or port them from the PiTube) so that your MZ80A/MZ700/MZ800 becomes the host for another CPU type/OS. You could even have the MK64FX512 as a second CPU like the BBC Tube concept.

I have almost completed the next evolution of the design where I switch back to the original tranZPUter concept and using a Cyclone IV 75K (I bought 35 of these devices quite cheaply) with fast static RAM (10ns) the Z80 is contained within the FPGA along with the Video and my ZPU EVO design as the I/O processor. The Cyclone IV has almost 600K of BRAM and 3x as many LE as this board so it gives many options.

For the legacy mode I’m considering options on how to work this, but my initial thoughts are a config flag on the SD card such that if set, the original CPU and Video hardware is used and only the I/O services such as the SD card will be accessible – still a work in progress but will come up with a suitable solution. The original video hardware output is fed into the FPGA and can drive the RGB outputs directly so you get the original machine performance and /WAIT states etc thus timing sensitive games should function correctly.

EPM7512AE –
Revision Name tranZPUterSW700
Top-level Entity Name tranZPUterSW700
Family MAX7000AE
Device EPM7512AETC144-7
Timing Models Final
Total macrocells 126 / 512 ( 25 % )
Total pins 114 / 120 ( 95 % )

Cyclone III -
Revision Name VideoController700
Top-level Entity Name VideoController700
Family Cyclone III
Device EP3C25E144C8
Timing Models Final
Total logic elements 2,107 / 24,624 ( 9 % )
Total combinational functions 1,819 / 24,624 ( 7 % )
Dedicated logic registers 910 / 24,624 ( 4 % )
Total registers 910
Total pins 65 / 83 ( 78 % )
Total virtual pins 0
Total memory bits 503,892 / 608,256 ( 83 % )
Embedded Multiplier 9-bit elements 0 / 132 ( 0 % )
Total PLLs 2 / 4 ( 50 % )
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IMG_2402.jpg
IMG_2401.jpg

psmart
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Re: Introduction

Post by psmart » Fri Oct 09, 2020 2:19 pm

Pictures below are for the MZ-80A which has the tranZPUter SW v2.2 board and the Video Module v2.0 board (equivalent to the above board but made as two separate boards) and the MZ-800 with a tranZPUter SW v2.2 board (no plans to add better graphics to the MZ-800 as it already has pixel graphics and 80 column output).
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IMG_2400.jpg
IMG_2370.jpg

psmart
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Re: Introduction

Post by psmart » Fri Oct 09, 2020 2:33 pm

Forgot to add:- both devices are fully reprogrammable with the Altera Quartus II software, you need v13.0.1 for the CPLD and v13.1 for the Cyclone III - see my website https://eaw.app/sharpmz-upgrades-video/ ... -in-docker to use docker which is the easiest way to use Quartus.

The CPLD is supposed to be guaranteed to be programmable 100 times but in my experience they can be reprogrammed 100's of times (I have yet to swap out a CPLD as it no longer programs).

The MK64FX512 is programmable via USB - I have installed the PJRC Teensy Bootloader MCU which makes it much easier to work with, you use a program called Teensy which uploads a HEX file output by GCC (or whichever flavour of compiler you like) and flashes the onboard 512K flash ram. My instructions for its use is here:- https://eaw.app/sharpmz-upgrades-tranzp ... h-teensy35

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